Designing a high voltage DC-link capacitor active precharge circuit

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Designing a high voltage DC-link capacitor active precharge circuit

Introduction

Electric vehicles (EVs) typically feature a large DC link capacitor (CDC LINK) to minimize voltage ripple at the input of the traction inverter. When powering up an EV, the purpose of precharging is to safely charge up CDC LINK before operating the vehicle. Charging CDC LINK up to the battery stack voltage (VBATT) prevents arcing on the contactor terminals, which can lead to catastrophic failures over time.

The conventional precharge method involves implementing a power resistor in series with the CDC LINK to create a resistor-capacitor (RC) network. However, as the total CDC LINK capacitance and VBATT increase, the required power dissipation grows exponentially. In this article, we’ll present a straightforward approach to designing an efficient, active pre-charge circuit using a spreadsheet calculator.

Understanding active precharge

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While passive precharge employs a power resistor to create an RC circuit that charges the capacitor asymptotically, active precharge can employ a switching converter with a buck topology that uses hysteretic inductor current control to deliver a constant charge current to the capacitor (Figure 1).

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Figure 1 The active precharge circuit where a buck converter uses a hysteretic inductor current control to deliver a constant charge current to the capacitor to enable the linear charge of the capacitor voltage (VCAP) up to the same voltage potential as the battery (VBATT). Source: Texas Instruments

This constant current enables linear charging of the capacitor voltage (VCAP) up to the same voltage potential as that of the battery. Figure 2 and Equation 1 characterize this linear behavior.

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Figure 2 Active precharge linear behavior using a buck topology with hysteretic inductor current control. Source: Texas Instruments

The first step is to determine the required charge current (ICHARGE). ICHARGE is the quotient of the total DC link charge (QDC LINK) and the required precharge time (tCHARGE) shown in Equation 2.

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QDC LINK is the product of CDC LINK and VBATT, as shown in Equation 3.

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Calculator overview

This active hysteretic buck circuit has a floating ground potential riding on the switch node, so powering the control system requires an isolated bias supply. The calculator tool will ensure that the power consumption of this control circuitry stays within the sourcing capability of the isolated bias supply, or else the voltage will collapse.

The High-Voltage Solid-State Relay Active Precharge Reference Design from Texas Instruments (TI) introduces an active solution that enhances energy transfer efficiency and reduces practical charge time. TI’s TPSI3052-Q1 is a fully integrated isolated bias supply used in the active precharge reference design, which can source and supply up to 83 mW of power to the isolated secondary. Gate drive current, device quiescent currents, and resistor dividers are the primary contributors to power consumption. Equation 4 characterizes the gate drive power (PGATE DRIVE) as the product of the gate drive current (IGATE DRIVE) and gate drive voltage (VS GATE DRIVER) which is 15 V, in the case of the reference design.

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Equation 5 characterizes gate drive current as the product of the metal-oxide semiconductor field-effect transistor (MOSFET) total gate charge (QG) and switching frequency (FSW).

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Equation 6 expresses how FSW varies according to VCAP throughout the charging period, creating the upside-down parabola in the FSW versus VCAP curve in Figure 3. As shown in the Figure, the gate drive current peaks at the maximum switching frequency (FSW_MAX), which occurs when VCAP reaches half of VBATT. Equation 7 expresses the relationship between FSW_MAX, VBATT, inductance (L) and peak-to-peak inductor current (dI):

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Figure 3 Calculator curve showing FSW versus VCAP and FSW LIMIT. Source: Texas Instruments

Using the calculator tool

The calculator prompts you to input various design parameters. The yellow cells are the required inputs while gray cells signify optional inputs. The default values in the gray cells reflect the parameters of the reference design. A user can change the gray cell values as needed. The white cells show the calculated values as outputs. A red triangle in the upper-right corner of a cell indicates an error; users will be able to see a pop-up text on how to fix them. The objective is to achieve a successful configuration with no red cells. This can be an iterative process where users can hover their mouse over each of the unit cells to read explanatory information.

Precharge system requirements

The first section of the calculator, shown in Figure 4, computes the required charge current
(ICHARGE REQUIRED) based on the VBATT, tCHARGE, and CDC LINK system parameters.

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Figure 4 The required charge current (ICHARGE REQUIRED) based on the VBATT, tCHARGE, and CDC LINK system parameters. Source: Texas Instruments

Inductance and charge current programming

The section of the calculator shown in Figure 5 calculates the actual average charging current (ICHARGE) and FSW_MAX. The average inductor current essentially equates to ICHARGE where ICHARGE must be equal to or greater than ICHARGE REQUIRED, this was calculated in the previous section to meet the desired tCHARGE.

Be mindful of the relationship between L, dI, and FSW_MAX as expressed in Equation 7. L and dI are each inversely proportional to FSW, so it is important to select values that do not exceed the maximum switching frequency limit (FSW LIMIT). Your inductor selection should accommodate adequate root-mean-square current (IRMS > ICHARGE), saturation current (ISAT > IL PEAK), and voltage ratings, with enough headroom as a buffer for each.

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Figure 5 Inductance and charge current programming parameters. Source: Texas Instruments

 Current sensing and comparator setpoints

The section of the calculator shown in Figure 6 calculates the bottom resistance (RB), top resistance (RT), and hysteresis resistance (RH) around the hysteresis circuit needed to meet the peak (IL PEAK) and valley (IL VALLEY) inductor current thresholds specified in the previous section. Input the current sense resistance (RSENSE) and RB. These are flexible and can be changed as needed. Make sure that the comparator supply voltage (VS COMPARATOR) is correct.

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Figure 6 Section that calculates the bottom resistance (RB), top resistance (RT), and hysteresis resistance (RH) around the hysteresis circuit needed to meet the peak (IL PEAK) and valley (IL VALLEY) inductor current thresholds. Source: Texas Instruments

Bias supply and switching frequency limitations

The section of the calculator shown in Figure 7 calculates the power available for switching the MOSFET (PREMAINING FOR FET DRIVE), by first calculating the total power draw (PTOTAL) associated with the hysteresis circuit resistors (PCOMP. RESISTORS), the gate driver integrated circuit (IC) (PGATE DRIVER IC), and the comparator IC (PCOMPARATOR IC), and subtracting it from the maximum available power of the TPSI3052-Q1 (PMAX_ISOLATED BIAS SUPPLY). Input the MOSFET total gate charge (QG TOTAL), device quiescent currents (IS GATE DRIVER IC and ISUPPLY COMP IC), and gate driver IC supply voltage (VS GATE DRIVER IC). The tool uses these inputs to calculate FSW LIMIT displayed as a red line in Figure 3.

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Figure 7 Isolated bias supply and switching frequency limitations parameters. Source: Texas Instruments

The calculator tool makes certain assumptions and do not account for factors such as comparator delays and power losses in both the MOSFET and the freewheeling diode. The tool assumes the use of rail-to-rail input and output comparators. Make sure to select a MOSFET with an appropriate voltage rating, RDSON, and parasitic capacitance parameters. Ensure the power loss in both the MOSFET and freewheeling diode are within acceptable limits. Finally, select a comparator with low offset and low hysteresis voltages with respect to the current sense peak and valley-level voltages. Simulating the circuit with the final calculator values ensures the intended operation.

Achieved the desired charge profile

Adopting an active hysteretic buck circuit significantly improves efficiency and reduces the size of the charging circuitry in high voltage DC-link capacitors found in EVs. This helps potentially lower the size, cost, and thermals of a precharge solution.

This article presents the design process to calculate the appropriate component values that help achieve the desired charge profile.

By embracing these techniques and tools, engineers can effectively improve the precharge functionality in EVs, leading to improved power management systems to meet the increasing demands of the automotive industry.

tilden-chen-2729794Tilden Chen works as an Applications Engineer for the Texas Instruments Solid State Relays team, where he provides product support and generates technical collateral to help win business opportunities. Tilden joined TI in 2021 after graduating from Iowa State University with a B.S. in Electrical Engineering. Outside of work, Tilden enjoys participating in Brazilian jiu-jitsu and shuffle dancing.

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 Hrag Kasparian, who joined Texas Instruments over 10 years ago, currently serves as a power applications engineer, designing custom dc-dc switch-mode power supplies. Previously, he worked on development of battery packs, chargers, and electric vehicle (EV) battery management systems at a startup company in Silicon Valley. Hrag graduated from San Jose State University with a bachelor of science in electrical engineering.

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