Building a Solar Constant Lighting System Using PV-Pushback-Effect with Mains Backup

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Building a Solar Constant Lighting System Using PV-Pushback-Effect with Mains Backup

Note that when the converter is turned ON, the variation in Vpv is restricted to a narrow range from 51.5 to 52.8 V. When the converter is turned OFF, the Vpv range is much wider, from 45.4 to 52.8 V. Ppvoff is plotted with its corresponding Vpv range of 45.4 to 52.8 V. The Ppvon plot from Figure 5 is replotted in Figure 6, against the Vpv range of 45.4 to 52.8 V, for the sake of comparison only.

The plots clearly reveal that when the converter is OFF, PV power is slightly higher. As discussed earlier, the SDL itself follows maximum power point. Hence, when we turn the converter ON, maximum power point gets disturbed due to a change in Vpv. Therefore, about a 1-W reduction in power output from the PV panels is observed when the converter is turned ON.

Resistive Load Testing

Lamps L1, L2 and L3 in Figure 3 were replaced with three 265-Ω resistors. The resistive loads don’t track the maximum power point. However, when the converter is turned ON, the operating point of the PV panels moves nearer to the maximum power point.

It was observed that with the converter ON, we get an extra 10% to 15% PV power output. Thus, if the proposed circuit is used for loads that don’t track maximum power point, we get some extra power from the PV.

Component Selection

The proposed circuit uses just diodes and resistors (instead of complex switching power circuits) to control power coming from mains supply. It’s necessary to minimize losses in these components.

Even though current in each of the diodes is less than 1 A, a high-current-rated diode type 6A10 has been selected. These 6-A diodes have lower forward voltage at lower currents. A Schottky diode will have much smaller forward voltage. However, Schottky diodes aren’t available in high peak-inverse-voltage (PIV) ratings. The diode 6A10 has a PIV of 1,000 V. The AC-DC converter is connected to a mains supply; from there, high-voltage transients can enter the circuit. Hence, use of high PIV diodes is recommended.

If the forward voltage drop of the selected diode isn’t acceptable, then a MOSFET-based polarity reversal protection circuit can be used. Such circuits have negligible forward voltage drop.

Moreover, on the PV side, during lightning, high-voltage transients may enter the circuit. Usually, solar panels come with built-in transient voltage protection. It’s recommended to have a 100-V TVS diode DT across the output terminals of the PV array on the panel. An electrolytic capacitor of 4,700 µF/100 V is connected at the output of PV array. This will smooth out sudden variations in PV voltage.

Checking Out Standby Mode

On a sunny day, if there’s steady and sufficient light output from the SDL itself, then the user can manually turn OFF the AC-DC converter to save power. However, if the sunlight is changing throughout the day, then the AC-DC converter must always be kept ON.

Even on partially cloudy days, there are intermittent spells of bright sunshine. Under such conditions, it’s possible to put the AC-DC converter in Standby Mode. By putting the converter in Standby mode, current drawn will be negligibly small. Whenever the sunlight intensity reduces, the converter will instantaneously come out of standby mode and provide sufficient light from mains power.

In Figure 3, components shown with * marks are employed to generate the Standby signal. Current-sensing resistor Rsh is used to sense the PV current. When PV current exceeds a threshold value (user-settable), the Standby signal (comparator output) goes high. This signal is connected to the converter, which then goes into Standby Mode. Components Rz (3.3 kΩ, 2 W) and Dz (Zener 5.1 V, 1 W) are used to generate the 5-V power supply (Vz) for the comparator.

Figure 7 shows the circuit diagram of the comparator. It consists of comparator IC1 (LM311). The reference voltage is connected to the inverting terminal Pin 3 using R10, R11 and R12. This reference voltage is user-settable with the help of potentiometer R10. Pin 3 also gets current from resistor R13, which is controlled by PNP transistor T1 (BC556). The non-inverting terminal Pin 2 is connected to the current-sensing resistor Rsh.

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